Lead Reconfigurable Memory Computing to the Feature

IPCore

Mobilenet-SSD

Allocation for Memory-Computing Resources

Support for Inner Memory

Yes

Depth:Adjustable(32bit MAX)
Width:Auto-adjustible(128~512bit)

MAC Array Size

INT8

INT16

FP16

FP32

User Defined Bit Width

≥ 64x64

Supported Data Types

Conv

Pooling

ReLU

Concat

Supported Operator Types

Max pooling

Pooling Types

2^N (512bit MAX)

Corresponding Model’s Typical Latency @200MHz

1.71ms

Inception-v2

ResNet50

BERT

Capability of High-Precision Quantifying

Yes

Yes

Depth:Adjustable(32bit MAX)
Width:Auto-adjustible(128~512bit)

INT8

INT16

FP16

FP32

Max,Ave /3x3 5x5 7x7 9x9

2^N (512bit MAX)

≥ 64x64

Conv

Pooling

ReLU

Concat

BatchNorm

15.52ms

Yes

Yes

Depth:Adjustable(32bit MAX)
Width:Auto-adjustible(128~512bit)

INT8

INT16

FP16

FP32

Max,Ave /3x3 5x5 7x7 9x9

2^N (512bit MAX)

≥ 64x64

Conv

Pooling

ReLU

Concat

Scale

Yes

Depth:Adjustable(32bit MAX)
Width:Auto-adjustible(128~512bit)

INT8

INT16

FP16

FP32

2^N (512bit MAX)

≥ 64x64

Matrix

Embedding

Linear

LayerNorm

17.1ms

Yes

32.79ms

Yes

Product Parameters

Supporting multiple data types with high quantification accuracy

Computing in Memory with low latency and high energy efficiency ratio

Adjustable parameters for more flexible deployment

Reconfigurable architecture, supporting a wide variety of operators, with strong model compatibility

▪    Fully-connected layers

▪    Dilated convolutions

▪    Max pooling, Average Pooling

▪    ReLU, GeLU

▪    Matrix Multiplications

▪    Adjustable bit width

▪    Adjustable computing MAC resources

▪    Adjustable memory resources

▪    INT8,  INT16, FP16, FP3

▪    Single model supports different precision quantization for each layer

▪    Single model supports different precision quantization for each layer

▪    High power density and high energy efficiency ratio

▪    Low external memory access and low latency